Bosch MAN-REG-X-08 Specifications download pdf (Page 40)

Data sheet

BMA220

Page 40

BST-BMA220-DS003-08 | Revision 1.15 | August 2011 Bosch Sensortec

third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Note: Specifications within this document are subject to change without notice.

7.2 SPI interface

The SPI interface integrated in BMA220 is a slave SPI. 16-bit protocols are used for single byte

reading and writing. Multiple bytes read-out is also possible. However, multiple bytes write is not

supported. The BMA220 supports SPI only in SPI mode 3 (CPOL = 1, CPHA = 1).

4-wire SPI and 3-wire SPI are using same protocols. The communication starts with a read/write

control bit followed by 7 bits address and at least 8 bits data. In case of reading out of

acceleration data from all axes the chip provides the option to use an automatic incremented

read command to read more than one byte (multiple read). This is activated when the SPI serial

enable pin CSB is held low during the data readout. Thus data from next address will be

automatically read out if the CSB are kept low for another 8 SPI clock cycles.

4-wire SPI protocol and timing

4-wire SPI is the default serial interface. It interacts with the outside world using CSB (chip

select low active), SCK (serial clock), SDI (serial data input) and SDO (serial data output).

The communication starts when the CSB is pulled low by the SPI master and stops when CSB

is pulled high. SCK is also controlled by SPI master. During the transitions on CSB, SCK must

be high. SDI and SDO are driven at the falling edge of SCK and should be captured at the rising

edge of SCK.

Single byte write/read commands use 16-bits protocol.

Bit0: Read/Write bit. When 0, the data SDI is written into the chip. When 1, the data SDO from

the chip is read.

Bit1-7: Address AD(6:0).

Bit8-15: when in write mode, these are data SDI, which will be written into the address. When in

read mode, these are the data SDO, which are read from the address.

CSB

SCK

SDI

R/W AD6 AD5 AD4 AD3 AD2 AD1 AD0 DI5 DI4 DI3 DI2 DI1 DI0 DI7 DI6

SDO

tri-state

Figure 15: 4-wire SPI write command

Write command is completed in 16 clock cycles. During the entire write cycle SDO remains in

high-impedance state.

1 2 ... 35 36 37 38 39 40 41 42 43 44 45 ... 62 63

No comments

Bosch MAN-REG-X-08 Specifications Page 40