Bosch 6000 User's Guide Page 78

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Chapter 2. Communication
63
PC-AT Interrupts
NOTE
This section uses a generic reference (“AT6nnn”) to represent all 6000 Series bus-based
products. When referring to the file names and programming examples, substitute the name
of your product where you read “AT6nnn”. (e.g., if you are using the AT6450, type “AT6450”)
Exceptions: For the OEM-AT6400, AT6200, & OEM-AT6200 products, type “AT6400”.
This section describes how to write PC-AT software that exploits the interrupt capability of
the bus-based 6000 Series controller (AT6nnn). To best understand the interrupt function, this
section is organized as follows:
AT6nnn interrupt path
How to use interrupts
Practical Example: Using the interrupt-driven terminal emulator (MC6ØTRMI) provided
in the DOS Support Disk
AT6nnn Interrupt Path
The 6000 Series controller is capable of interrupting the PC-AT. When interrupted, the 80x86
processor executes an interrupt service routine (ISR). The path that the controller interrupt
takes to get to the 80x86 processor is shown below.
Interrupt
Service
Routine
(ISR)
80x86
Interrupt
Vector Table
80x86
Maskable
Interrupt Enable
8259
Interrupt
Enable
AT6nnn
Interrupt
Enable
AT6nnn
Interrupt
Notice that the AT6nnn interrupt must get by three different interrupt enables before the 80x86
processor can be interrupted:
1. Interrupts must be enabled within the AT6nnn.
2. Appropriate PC-AT hardware interrupt must be enabled within the 8259 interrupt
controller.
3. The interrupt flag must be set within the 80x86 processor.
When the AT6nnn interrupt arrives at the 80x86 processor, the address of the interrupt service
routine must be in the interrupt vector table so that the 80x86 processor knows where to
handle the interrupt.
AT6nnn
Interrupt Enable
Up to four different kinds of interrupts can be enabled within the AT6nnn:
Interrupt PC-AT when AT6nnn output buffer has data
Interrupt PC-AT when AT6nnn input buffer (256 bytes/characters) is empty
Interrupt PC-AT when AT6nnn hardware interrupt condition occurs (see description of
INTHW command in 6000 Series Software Reference)
Interrupt PC-AT when AT6nnn status has been updated
AT6nnn interrupts are enabled/disabled by writing to the AT6nnn interrupt enable register
(AT6nnn base port address + 4).
Also, DIP switch package S2 on the AT6nnn card must be set to the appropriate hardware
interrupt request line (IRQ0-IRQ15). Refer to the table below. IRQ0-IRQ15 are signals that
reside on the PC-AT bus. Setting a switch to the ON position connects the AT6nnn interrupt
line to a PC-AT interrupt request (IRQ) line. Make sure only one switch is ON at one time.
Interrupt Request Line AT6nnn Interrupt DIP Switch
IRQ3
IRQ4
IRQ5
IRQ7
IRQ10
IRQ11
IRQ12
IRQ15
S2.1
S2.2
S2.3
S2.4
S2.5
S2.6
S2.7
S2.8
Refer to your product's
Installation Guide
to locate the DIP switch.
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