Chapter 2. Communication
65
How to Use Interrupts
This section leads you through the following steps for using interrupts:
➀ Install address of interrupt service routine (ISR) in 80x86 interrupt vector table
➁ Enable hardware interrupts (IRQ0-IRQ15) within 8259 interrupt controller
➂ Enable interrupt sources within AT6nnn
➃ Process interrupts in ISR
a. Identify interrupt
b. Process interrupt
c. Clear interrupt
d. Send end-of-interrupt code to 8259 interrupt controller
➄ Disable interrupt sources within AT6nnn
➅ Restore original interrupt vector
➆ Exit program
➀ Initialize
Interrupt
Vector
In this step, you will install the address of your interrupt service routine in the 80x86 interrupt
vector table.
Use function 35H of INT 21H to retrieve the interrupt vector that is going to be changed.
Save this vector—later, you will restore the interrupt vector prior to exiting your program
(see below).
/* Get and save original interrupt vector */
inregs.h.ah = 0x35; /* Function 35H */
inregs.h.al = int_num; /* Interrupt number */
intdosx(&inregs, &outregs, &segregs); /* Call INT 21H */
oldseg = segregs.es /* Save vector segment */
oldoff = outregs.x.bx; /* Save vector offset */
Then use Function 25H of INT 21H to set an interrupt vector to your interrupt service routine.
Function 25H automatically disables hardware interrupts when the vector is changed.
/* Set interrupt vector to isr */
inregs.h.ah = 0x25; /* Function 25H */
inregs.h.al = int_num; /* Interrupt number */
segregs.ds = FP_SEG(isr); /* Get isr segment */
inregs.x.dx = FP_OFF(isr); /* Get isr offset */
intdosx(&inregs, &outregs, &segregs); /* Call INT21H */
➁ Enable
Interrupts in
8259
This second step requires you to enable a hardware interrupt (IRQ0-IRQ15) within the 8259
interrupt controller. This is accomplished by writing to the 8259 interrupt mask register
(8259 base port address + 1).
Enable IRQ0 Interrupt
Enable IRQ1 Interrupt
Enable IRQ2 Interrupt
Enable IRQ3 Interrupt
Enable IRQ4 Interrupt
Enable IRQ5 Interrupt
Enable IRQ6 Interrupt
Enable IRQ7 Interrupt
Enable IRQ8 Interrupt
Enable IRQ9 Interrupt
Enable IRQ10 Interrup
Enable IRQ11 Interrup
Enable IRQ12 Interrup
Enable IRQ13 Interrup
Enable IRQ14 Interrup
Enable IRQ15 Interrup
Interrupt Mask Register (21H) for First 8259 Interrupt Mask Register (A1H) for Second 8259
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
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